A Detailed Study of the Forming Stage of an Electrochemical Resistive Switching Memory by KMC Simulation

Author

Pan, Feng ; Yin, Shong ; Subramanian, Vivek

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California-Berkeley, Berkeley, CA, USA

Volume

32

Issue

7

fYear

2011

fDate

7/1/2011 12:00:00 AM

Firstpage

949

Lastpage

951

Abstract

The forming stage characteristics of electrochemical-metallization resistive-switching-random-access-memory cells are studied with an improved kinetic Monte Carlo simulator. The filament topographies obtained at different forming voltage levels and the relationship between forming time and filament topographies are investigated in detail. The so-called “voltage-time dilemma” is simulated and studied. In addition, the various chemical and physical processes that produce these results are discussed. Finally, the simulated pattern is compared with experiments conducted on Cu/H₂O and Ag/Ag₂S systems.

Keywords

Monte Carlo methods; random-access storage; semiconductor device metallisation; KMC simulation; electrochemical-metallization resistive-switching-random-access-memory cell; filament topography; kinetic Monte Carlo simulator; time topography; voltage level; voltage-time dilemma; Anodes; Cathodes; Copper; Surface topography; Surface treatment; Switches; Electrochemical; filament; forming stage; kinetic Monte Carlo (KMC); resistive switching random access memory (RRAM);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2143691

Filename

5766706