Simulation of wafer-scale GTO thyristors in circuits

Author

Johnson, C. Mark ; Palmer, Patrick R.

Author_Institution

Dept. of Eng., Cambridge Univ., UK

Volume

6

Issue

2

fYear

1991

fDate

4/1/1991 12:00:00 AM

Firstpage

308

Lastpage

313

Abstract

A simulation technique that allows the study of large area power devices composed of many outwardly identical elements operating in a realistic power circuit has been developed. Results are presented showing the transient redistribution of current between a pair of GTO thyristor elements during turn-off under the influence of the power circuit. The method is validated by comparing simulated results with experimental measurements. Variations in carrier lifetime. diffusion uniformity, and gate contact position are studied, and they are shown to significantly alter the turn-off performance. Conclusions are drawn concerning the reliability of large area latching power devices with process inhomogeneity

Keywords

power supply circuits; semiconductor device models; thyristor applications; thyristors; GTO thyristors; carrier lifetime; diffusion uniformity; gate contact position; power circuit; process inhomogeneity; reliability; semiconductor device models; simulation; transient current redistribution; turn-off; Cathodes; Charge carrier lifetime; Circuit simulation; Computational modeling; Low voltage; Manufacturing processes; Power semiconductor switches; Robustness; Semiconductor device modeling; Thyristors;

fLanguage

English

Journal_Title

Power Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0885-8993

Type

jour

DOI

10.1109/63.76818

Filename

76818