Minimizing power consumption in direct sequence spread spectrum correlators by resampling IF samples-Part II: implementation issues

Most modern digital receivers sample the received RF signal at an intermediate frequency, then downconvert to the baseband in the digital domain. Instead of correlating at the sampling frequency, the received Signal is downsampled to two samples per chip using an all-unity resampling filter presented in Part I of this paper. Four different resampling parallel correlator architectures are presented and compared in terms of power and area using analytical techniques as well as simulation data obtained from actual circuit layouts. The resampling process reduces the power consumption of the correlators by almost the resampling ratio, which is twice the chip frequency divided by the sampling frequency. Additional reduction of over a factor of two is possible using the architectures presented in this paper