Title :
LAyer Selection by ERase (LASER) With an Etch-Through-Spacer Technique in a Bit-Line Stacked 3-D nand Flash Memory Array
Author :
Yun, Jang-Gn ; Park, Se Hwan ; Park, Byung-Gook
Author_Institution :
Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., Seoul, South Korea
fDate :
7/1/2011 12:00:00 AM
Abstract :
A novel electrical layer-selection method in a bit-line stacked 3-D nand memory array is proposed. The stacked layers are selected by using multiple source select lines with erased cells in a layer. The operation scheme and simulation results for the electrical layer selection are discussed. An etch-through-spacer technique is developed to form a terraced body for a vertical contact process.
Keywords :
NAND circuits; flash memories; LASER; bit-line stacked 3-D NAND flash memory array; electrical layer-selection method; etch-through-spacer technique; multiple source select line; vertical contact process; Arrays; Flash memory; Interference; Lasers; Lithography; Materials; Transistors; 3-D memory; Electrical initialization; etch-through-spacer (ETS) technique; layer selection;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2011.2142417
