DocumentCode
1517401
Title
Highly Efficient Test Response Compaction Using a Hierarchical X-Masking Technique
Author
Rabenalt, Thomas ; Richter, Michael ; Poehl, Frank ; Goessel, Michael
Author_Institution
Infineon Technol., Neubiberg, Germany
Volume
31
Issue
6
fYear
2012
fDate
6/1/2012 12:00:00 AM
Firstpage
950
Lastpage
957
Abstract
This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically adapt to and provide excellent performance over a wide range of x-densities. A major contribution of this paper is a technique that enables the efficient loading of the x-masking data into the masking logic in a parallel fashion using the scan chains. A method for eliminating the requirement for dedicated mask control signals using automated test equipment timing flexibility is also presented. The proposed compactor is especially suited to multisite testing. Experiments with industrial designs show that the proposed compactor enables compaction ratios exceeding 200x.
Keywords
automatic test equipment; logic circuits; logic testing; masks; shift registers; automated test equipment timing flexibility; efficient test response compaction; hierarchical X-masking technique; hierarchical configurable masking register; high effective compactor architecture; industrial designs; mask control signals; masking logic; multisite testing; scan chains; x-densities; Circuit faults; Compaction; Latches; Loading; Registers; Testing; Timing; Design for testability (DFT); test response compaction; x-masking; x-values;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2011.2181847
Filename
6200442
Link To Document