Vertical Silicon p-n-p-n Tunnel nMOSFET With MBE-Grown Tunneling Junction

Author

Tura, Ahmet ; Zhang, Zhenning ; Liu, Peichi ; Xie, Ya-Hong ; Woo, Jason C S

Author_Institution

Intel Corp., Hillsboro, OR, USA

Volume

58

Issue

7

fYear

2011

fDate

7/1/2011 12:00:00 AM

Firstpage

1907

Lastpage

1913

Abstract

Tunnel field-effect transistors (TFETs) can potentially achieve sub-60-mV/dec SS, but their performance strongly depends on the dopant profile at the tunneling junction. In this paper, very sharp (~.2 nm/dec) optimized tunneling-junction dopant profile for the silicon p-n-p-n TFET is demonstrated by molecular beam epitaxial growth. Devices are fabricated with a low-thermal-budget ( <; 620°C) vertical process flow to preserve the as-grown channel profile. Compared with a p-i-n TFET, the p-n-p-n TFET has 30% lower subthreshold swing, I_ON three times higher, and 50% reduced tunneling voltage drop.

Keywords

MOSFET; electric potential; elemental semiconductors; molecular beam epitaxial growth; p-n junctions; silicon; tunnelling; MBE-grown tunneling junction; Si; dopant profile; low-thermal-budget vertical process flow; metal-oxide-semiconductor field-effect transistor; molecular beam epitaxial growth; p-i-n TFET; subthreshold swing; tunneling voltage drop; vertical silicon p-n-p-n tunnel nMOSFET; Doping; FETs; Junctions; Logic gates; PIN photodiodes; Silicon; Tunneling; p-i-n tunnel field-effect transistor (TFET); p-n-p-n tunnel field-effect transistor (TFET);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2011.2148118

Filename

5770203