DocumentCode :
1518933
Title :
A New Model for Through-Silicon Vias on 3-D IC Using Conformal Mapping Method
Author :
Cheng, Tai-Yu ; Wang, Chuen-De ; Chiou, Yih-Peng ; Wu, Tzong-Lin
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
22
Issue :
6
fYear :
2012
fDate :
6/1/2012 12:00:00 AM
Firstpage :
303
Lastpage :
305
Abstract :
Based on the conformal mapping technique, a novel macro- π model is proposed to accurately predict the electrical performance of a low pitch-to-diameter ratio (P / D) through-silicon via (TSV) pair on the 3-D IC. The model combines the conventional resistance and inductance (RL) circuit with several parallel capacitances and conductance (CG) circuit. The accuracy-improved CG model rigorously considers the proximity effect. The model can be established by using the derived closed-form formula that is related to geometrical parameters of the TSVs. Compared with the conventional π-type model, the proposed model can significantly reduce the error of CG value from 25% to 2% with respect to a full-wave simulation, and thus the insertion loss can be well predicted from dc to 40 GHz.
Keywords :
integrated circuit modelling; millimetre wave integrated circuits; three-dimensional integrated circuits; 3D IC; TSV; accuracy-improved CG model; closed-form formula; conductance circuit; conformal mapping method; frequency 40 GHz; full-wave simulation; inductance circuit; insertion loss; low pitch-to-diameter ratio through-silicon via; parallel capacitances; Capacitance; Conformal mapping; Integrated circuit modeling; Silicon; Solid modeling; Substrates; Through-silicon vias; 3-D integrated circuits; Conformal mapping; equivalent circuit model; through-silicon via (TSV);
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2012.2195776
Filename :
6202384
Link To Document :
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