Calculation of message delays and message waiting times in switching elements with slow access lines

In this paper we study the delay performance of an ATDM switching element, to which messages composed of a variable number of fixed-length packets arrive via “low-speed” access lines, at the rate of one packet per time slot. More specifically, we analyse the message waiting times and the message delays encountered in this switching element, and compare the results with the case of “fast” access lines, in which all the packets of a message arrive in the same slot. The study is an extension/continuation of previous work, which was mainly concerned with the derivation of buffer occupancies and packet delays