DocumentCode
1519338
Title
On Clustering of Undetectable Single Stuck-At Faults and Test Quality in Full-Scan Circuits
Author
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
29
Issue
7
fYear
2010
fDate
7/1/2010 12:00:00 AM
Firstpage
1135
Lastpage
1140
Abstract
We demonstrate that undetectable single stuck-at faults in full-scan benchmark circuits tend to cluster in certain areas. This implies that certain areas may remain uncovered by a test set for single stuck-at faults. We describe an extension to the set of target faults aimed at providing a better coverage of the circuit in the presence of undetectable single stuck-at faults. The extended set of target faults consists of double stuck-at faults that include an undetectable fault as one of their components. The other component is a detectable fault adjacent to the undetectable fault. We present experimental results of fault simulation and test generation for the extended set of target faults.
Keywords
benchmark testing; circuit testing; fault diagnosis; pattern clustering; double stuck-at faults; full-scan benchmark circuits; full-scan circuit test quality; undetectable single stuck-at fault clustering; Benchmark testing; Bridge circuits; Circuit faults; Circuit simulation; Circuit testing; Cities and towns; Electrical fault detection; Fault detection; Fault diagnosis; Integrated circuit testing; Full-scan; stuck-at faults; test generation; test quality; undetectable faults;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2010.2046448
Filename
5487471
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