DSS MOSFET With Tunable SDE Regions by Fluorine Pre-Silicidation Ion Implant

Fluorine pre-silicidation ion implant (F-PSII) is shown to enable reduction of the lateral source/drain extension junction depth (Xj,SDE) in NiSi dopant-segregated Schottky (DSS) source/drain SOI MOSFETs formed by implant-to-silicide (ITS) with P. F segregation at the NiSi/Si interface reduces the amount of Ni rejection from the NiSi during post-ITS anneal, which reduces the spatial vacancy distribution near the NiSi/Si interface, in turn reducing Xj,SDE and therefore short channel effects. The leakage floor l_min and electron Schottky barrier height are also reduced with F-PSII. This finding reveals new opportunities for single silicide DSS CMOS, whereby DSS MOSFETs can be individually tuned with F-PSII dose to obtain the optimal X_j,SDE.