1520794

Study of the Multistep-Deposited and UV-Ozone-Annealed HfZrO Gate Stack by Scanning Tunneling Microscopy and Pulse – gate stack formed via multistep deposition cum room-temperature ultraviolet-ozone (UVO) anneal was examined using scanning tunneling microscopy and pulse capacitance–voltage measurement, and the results were compared with those of the as-deposited (as-dep) and rapid-thermal-annealed (RTA) samples. Evidence shows that a large part of the improvement seen in the multistep-deposited cum UVO-annealed sample, relative to the RTA sample, is a direct consequence of suppressed crystallization of the HfZrO and, hence, a reduction in the density of grain-boundary-related defects. Compared with the as-dep sample, the observed improvement due to UVO annealing is marginal, although further improvement, ascribed to the elimination of oxygen-vacancy defects, may be achieved by either increasing the UVO anneal time after each deposition step or increasing the number of deposition steps. This makes multistep deposition and UVO annealing viable for further enhancing the robustness of the high-k gate dielectric in a gate-last process.

High K dielectric materials; Logic gates; Microscopy; Pulse measurements; Rapid thermal annealing; Tunneling; Fast capacitance–voltage measurement; gate oxide integrity; metal/high-k gate stack; oxygen vacancy; scanning probe microscopy;

English

Electron Devices, IEEE Transactions on

ieee

0018-9383

jour

10.1109/TED.2012.2196702

6203400