• DocumentCode
    1520806
  • Title

    Erratum: Analytic Model for the Surface Potential and Drain Current in Negative Capacitance Field-Effect Transistors

  • Author

    Jiménez, David ; Miranda, Enrique ; Godoy, Andrés

  • Author_Institution
    Departament d´´Enginyeria Electrònica, Escola d´´Enginyeria, Universitat Autònoma de Barcelona, Barcelona, Spain
  • Volume
    58
  • Issue
    8
  • fYear
    2011
  • Firstpage
    2818
  • Lastpage
    2818
  • Abstract
    In the above titled paper (ibid., vol. 57, no. 10, pp. 2405-2409, Oct. 2010), there were typographical errors in Section III. The errors are corrected here.
  • Keywords
    Analytical models; Capacitance; FETs; Ferroelectric materials; Low power electronics; Semiconductor device modeling; Field-effect transistors (FETs); low-power switching; metal–ferroelectric–semiconductor devices; negative capacitance devices; nonvolatile memory devices; steeper subthreshold transistors;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2149532
  • Filename
    5771083
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1520806