Title :
Erratum: Analytic Model for the Surface Potential and Drain Current in Negative Capacitance Field-Effect Transistors
Author :
Jiménez, David ; Miranda, Enrique ; Godoy, Andrés
Author_Institution :
Departament d´´Enginyeria Electrònica, Escola d´´Enginyeria, Universitat Autònoma de Barcelona, Barcelona, Spain
Abstract :
In the above titled paper (ibid., vol. 57, no. 10, pp. 2405-2409, Oct. 2010), there were typographical errors in Section III. The errors are corrected here.
Keywords :
Analytical models; Capacitance; FETs; Ferroelectric materials; Low power electronics; Semiconductor device modeling; Field-effect transistors (FETs); low-power switching; metal–ferroelectric–semiconductor devices; negative capacitance devices; nonvolatile memory devices; steeper subthreshold transistors;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2011.2149532
