Title :
New VLSI array processor design for image window operations
Author :
Li, D.J. ; Jiang, L. ; Isshiki, T. ; Kunieda, H.
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan
fDate :
5/1/1999 12:00:00 AM
Abstract :
A novel architecture named window-memory sharing processor array is proposed, which targets window operations in image processing. The architecture can be used not only for conventional image filtering, but also in practical window operations such as motion vector search in MPEG2. The derived architecture is flexible enough to satisfy user´s requirement for either area or speed
Keywords :
VLSI; digital signal processing chips; image processing equipment; motion estimation; parallel architectures; MPEG2; VLSI array processor; array processor design; image filtering; image processing; image window operations; motion vector search; window-memory sharing processor array; Broadcasting; Computer architecture; Design methodology; Filtering; Image processing; Memory; Process design; Streaming media; Systolic arrays; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
