Performance and Reliability Study of Single-Layer and Dual-Layer Platinum Nanocrystal Flash Memory Devices Under NAND Operation

Author

Singh, Pawan K. ; Bisht, Gaurav ; Auluck, Kshitij ; Sivatheja, M. ; Hofmann, Ralf ; Singh, Kaushal K. ; Mahapatra, Souvik

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai, India

Volume

57

Issue

8

fYear

2010

Firstpage

1829

Lastpage

1837

Abstract

Memory window (MW) and the retention of single-layer (SL) and dual-layer (DL) platinum (Pt) nanocrystal (NC) devices are extensively studied before and after program/erase (P/E) cycling. DL devices show better charge storage capability and reliability over the SL devices. Up to 50% improvement in the stored charge is estimated in the DL device over SL when P/E is performed at equal field. Excellent high temperature and postcycling retention capabilities of SL and DL devices are shown. The impact of the interlayer film (ILF) thickness on the retention of the DL structure is reported. While SL devices show poor P/E cycling endurance, DL cycling is shown to meet the minimum requirements of the multilevel cell (MLC) operation.

Keywords

NAND circuits; circuit reliability; flash memories; NAND operation; dual-layer platinum nanocrystal flash memory devices; memory window; program/erase cycling; reliability; single-layer platinum nanocrystal flash memory devices; Dielectric losses; Flash memory; Gold; Nanocrystals; Nanoelectronics; Nickel; Nonvolatile memory; Platinum; Temperature; Thickness control; Cycling endurance; Flash memory; dual layer (DL); metal nanocrystals (NC); reliability; retention; single layer (SL);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2050961

Filename

5491145