• DocumentCode
    1522415
  • Title

    Sequence compaction for power estimation: theory and practice

  • Author

    Marculescu, Radu ; Marculescu, Diana ; Pedram, Massoud

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
  • Volume
    18
  • Issue
    7
  • fYear
    1999
  • fDate
    7/1/1999 12:00:00 AM
  • Firstpage
    973
  • Lastpage
    993
  • Abstract
    Power estimation has become a critical step in the design of today´s integrated circuits (ICs). Power dissipation is strongly input pattern dependent and, hence, to obtain accurate power values one has to simulate the circuit with a large number of vectors that typify the application data. The goal of this paper is to present an effective and robust technique for compacting large sequences of input vectors into much smaller ones such that the power estimates are as accurate as possible and the simulation time is reduced by orders of magnitude. Specifically, this paper introduces the hierarchical modeling of Markov chains as a flexible framework for capturing not only complex spatiotemporal correlations, but also dynamic changes in the sequence characteristics. In addition to this, we introduce and characterize a family of variable-order dynamic Markov models which provide an effective way for accurate modeling of external input sequences that affect the behavior of finite state machines. The new framework is very effective and has a high degree of adaptability. As the experimental results show, large compaction ratios of orders of magnitude can be obtained without significant loss in accuracy (less than 5% on average) for power estimates
  • Keywords
    Markov processes; binary sequences; circuit CAD; circuit simulation; finite state machines; integrated circuit design; logic CAD; low-power electronics; IC design; Markov chains; compaction ratios; external input sequences; finite state machines; hierarchical modeling; input pattern dependent; input vectors; logic CAD; low-power electronics; power estimation; robust technique; sequence characteristics; sequence compaction; simulation time; spatiotemporal correlations; variable-order dynamic Markov models; Capacitance; Circuit simulation; Compaction; Design automation; Energy consumption; Estimation theory; Frequency estimation; Power dissipation; Power system modeling; Switching circuits;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.771179
  • Filename
    771179