Folded-Accumulation LDMOST: New Power MOS Transistor With Very Low Specific On-Resistance

A new lateral power MOSFET structure [folded-accumulation LDMOS (FALDMOS)] is proposed, in which the silicon-substrate surface is trenched to form a folded shape from the channel to the drain electrode and the gate is extended to the drain. The majority-carrier accumulation layer is formed as the device is in on state due to the extended gate in the drift region whose concentration is higher than that in a conventional LDMOS at the same breakdown voltage (BV), resulting from the additional electric-field modulation, and an extra majority carrier is introduced on the sidewall of the trench, which reduced the on-resistance of the drift region further. In addition, the channel density is doubled because of trenching the folded channel, which reduced the channel on-resistance. It indicates by simulation that the specific on-resistance of 4.6 mOmegamiddotmm² with a BV of 27.4 V in FALDMOS is lower than that of the previously reported lowest one.