DocumentCode
1523611
Title
Pulse swallow frequency divider with idle DFFs automatically powered off
Author
Haijun Gao ; Lingling Sun ; Jun Liu
Author_Institution
Key Lab. for RF Circuits & Syst., Hangzhou Dianzi Univ., Hangzhou, China
Volume
48
Issue
11
fYear
2012
Firstpage
636
Lastpage
638
Abstract
A pulse swallow frequency divider with ultra-low power consumption is presented. The D flip-flops (DFFs) in the prescaler and the swallow counter are controlled by the modulus control signal and are automatically powered off when they have no contribution to the operation of the divider. Implemented in SMIC 65nm CMOS process, the proposed divider can operate from 0.6 to 4.2 GHz, and the power consumption is 1.35 mW when operating at 2.4 GHz.
Keywords
CMOS integrated circuits; MMIC frequency convertors; UHF frequency convertors; UHF integrated circuits; field effect MMIC; flip-flops; frequency dividers; low-power electronics; SMIC CMOS process; automatic power-off; frequency 0.6 GHz to 4.2 GHz; idle D flip-flop; modulus control signal; power 1.35 mW; prescaler; pulse swallow frequency divider; size 65 nm; swallow counter; ultralow power consumption;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2012.0545
Filename
6204275
Link To Document