• DocumentCode
    1523716
  • Title

    Theory of latency-insensitive design

  • Author

    Carloni, Luca P. ; McMillan, Kenneth L. ; Sangiovanni-Vincentelli, Alberto L.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • Volume
    20
  • Issue
    9
  • fYear
    2001
  • fDate
    9/1/2001 12:00:00 AM
  • Firstpage
    1059
  • Lastpage
    1076
  • Abstract
    The theory of latency-insensitive design is presented as the foundation of a new correct-by-construction methodology to design complex systems by assembling intellectual property components. Latency-insensitive designs are synchronous distributed systems and are realized by composing functional modules that exchange data on communication channels according to an appropriate protocol. The protocol works on the assumption that the modules are stallable, a weak condition to ask them to obey. The goal of the protocol is to guarantee that latency-insensitive designs composed of functionally correct modules behave correctly independently of the channel latencies. This allows us to increase the robustness of a design implementation because any delay variations of a channel can be “recovered” by changing the channel latency while the overall system functionality remains unaffected. As a consequence, an important application of the proposed theory is represented by the latency-insensitive methodology to design large digital integrated circuits by using deep submicrometer technologies
  • Keywords
    digital integrated circuits; industrial property; integrated circuit design; protocols; telecommunication channels; communication channel; complex system; correct-by-construction methodology; data exchange; deep submicron technology; delay recovery; digital integrated circuit; formal method; functional module; intellectual property; latency-insensitive design; protocol; synchronous distributed system; Application specific integrated circuits; Assembly systems; Clocks; Communication channels; Delay estimation; Design methodology; Integrated circuit interconnections; Integrated circuit synthesis; Integrated circuit technology; Protocols;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.945302
  • Filename
    945302