Title :
A parallel unification machine
Author :
Sibai, F.N. ; Watson, K.L. ; Lu, Mi
Author_Institution :
Dept. of Electr. Eng., Akron Univ., OH, USA
Abstract :
A parallel unification machine (PUM) that speeds up the unification algorithm is proposed. The PUM partitions unification into a match step and a consistency-check step, conducts these two steps concurrently, and takes advantage of the match parallelism. The machine architecture, algorithms, data formats, and processor organization are described. The machine has been simulated at the register-transfer level with the ISPS computer description language. The simulated performance is compared with that of two serial unification coprocessors. Significant speedup is observed.<>
Keywords :
parallel machines; performance evaluation; ISPS computer description language; algorithms; consistency-check step; data formats; match parallelism; match step; parallel unification machine; processor organization; register-transfer level; serial unification coprocessors; simulated performance; Application software; Artificial intelligence; Expert systems; Image databases; Logic programming; Magnetic heads; Natural languages; Runtime; Spatial databases; Speech;
Journal_Title :
Micro, IEEE
