Logic models for continuous time

Logic simulation has been used for decades and is now part of all CAD systems, and yet theoretical aspects of the analogue-to-digital abstraction still need to be studied and formalised. The paper discusses the preservation of analogue circuit properties (continuity, causality and time invariance), during the construction of logic models. Modelling the analogue circuit behaviour and constructing a logic model requires a transformation of the continuous change of state into a timed start sequence. A new parsing algorithm, called a continuous-time automaton, is proposed to solve the problem. As for all parsing algorithms, this logic modelling technique leads to simple and efficient simulation algorithms. The paper is concerned with the theoretical aspects and leaves the door open for the practitioner to study real-life benefits. A formal approach should provide a solid foundation for device specification and modelling