DocumentCode
1525004
Title
Through-the-gate-implanted ultrathin gate oxide MOSFET´s with corner parasitics-free shallow-trench-isolation
Author
Schwalke, Udo ; Gschwandtner, Alexander ; Innertsberger, Gudrun ; Kerber, Martin
Author_Institution
Siemens Corp. Technol., Munich, Germany
Volume
20
Issue
7
fYear
1999
fDate
7/1/1999 12:00:00 AM
Firstpage
363
Lastpage
365
Abstract
We have realized direct-tunneling (DT) gate oxide (1.6 nm) NMOS and PMOS transistors by means of through-the-gate-implantation in a corner parasitics-free shallow-trench-isolation CMOS technology. In order to take full advantage of in situ cluster-tool processing and to preserve initial wafer-surface quality, the essential part of the MOS gate is fabricated prior to device isolation and through-the-gate-implantation is utilized for well- and channel-doping. In addition, a fully-reinforced-gate-oxide-perimeter is provided and trench corner parasitics are eliminated by the advanced process architecture without increasing process complexity. Fully functional direct-tunneling oxide MOSFET´s with excellent electrical characteristics confirm the feasibility of this novel approach.
Keywords
MOSFET; cluster tools; ion implantation; isolation technology; tunnelling; 1.6 nm; CMOS technology; MOSFET; NMOS transistor; PMOS transistor; channel doping; cluster tool processing; corner parasitics; direct tunneling; electrical characteristics; shallow trench isolation; through-the-gate-implantation; ultrathin gate oxide; well doping; Boron; CMOS technology; Electric variables; Isolation technology; MOS devices; MOSFET circuits; Oxidation; Rough surfaces; Surface cleaning; Surface roughness;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.772377
Filename
772377
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