Title :
A 16-mW, 120-dB linear switched-capacitor delta-sigma modulator with dynamic biasing
Author :
Kasha, Dan B. ; Lee, Wai L. ; Thomsen, Axel
Author_Institution :
Crystal Semicond. Div., Cirrus Logic Inc., Nashua, NH, USA
fDate :
7/1/1999 12:00:00 AM
Abstract :
A high-resolution, fourth-order ΔΣ analog-to-digital converter is presented. Power-reduction techniques have been applied across many aspects of the design. A class-A amplifier was designed with bias currents optimized according to the expected activity in each clock phase. The modulator achieves a 122 dB dynamic range over a 400-Hz bandwidth, -123-dB total harmonic distortion, and 16-mW power consumption from a single 5-V supply. It is implemented in a 0.6-μm double-polysilicon CMOS process and has an active area of 2 mm2
Keywords :
CMOS integrated circuits; analogue-digital conversion; delta-sigma modulation; harmonic distortion; low-power electronics; switched capacitor networks; 0.6 micron; 16 mW; 400 Hz; 5 V; analog-to-digital converter; class-A amplifier; double-polysilicon CMOS process; dynamic biasing; fourth-order ΔΣ ADC; high-resolution; linear switched-capacitor delta-sigma modulator; power-reduction techniques; switched-capacitor type; total harmonic distortion; Analog-digital conversion; Bandwidth; Circuit noise; Clocks; Costs; Delta modulation; Design optimization; Energy consumption; Power dissipation; Total harmonic distortion;
Journal_Title :
Solid-State Circuits, IEEE Journal of
