Title :
Deposited inter-polysilicon dielectrics for nonvolatile memories
Author :
Klootwijk, Johan H. ; van Kranenburg, Herma ; Woerlee, Pierre H. ; Wallinga, Hans
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fDate :
7/1/1999 12:00:00 AM
Abstract :
Deposited instead of thermally grown oxides were studied to form very high-quality inter-polysilicon dielectric layers for embedded nonvolatile memory application. It was found that by optimizing the microstructure, i.e., texture and morphology of the polysilicon layers, and by optimizing the post dielectric deposition anneal, very high-quality dielectric layers can be obtained. In this paper it is shown on simple capacitor structure level and full EEPROM device level that the electrical properties of interpoly dielectric layers can be improved tremendously by using deposited dielectric layers with additional rapid thermal anneal. Typical results are: a high charge-to-breakdown (QBD≈25 C/cm2), low leakage currents and decreased charge trapping during constant current stress. An additional advantage is the low thermal budget, which is very attractive for embedded applications. However, results depend on the polysilicon preparation, dielectric type and RTP anneal environment. From electrical evaluation it appeared that even for deposited dielectric layers the influence of polysilicon surface roughness and corners is considerable. The optimized combination of flat polysilicon layers, deposited inter-polysilicon dielectric and additional optimized rapid thermal anneal have been applied in full EEPROM devices. Cycling over one million cycles was possible, which indicates an endurance improvement by a factor of 10
Keywords :
EPROM; chemical vapour deposition; dielectric thin films; leakage currents; rapid thermal annealing; semiconductor device breakdown; surface topography; tunnelling; EEPROM device level; Si; capacitor structure level; charge trapping; charge-to-breakdown; constant current stress; electrical properties; endurance improvement; inter-polysilicon dielectrics; leakage currents; morphology; nonvolatile memories; post dielectric deposition anneal; rapid thermal anneal; surface roughness; texture; thermal budget; Capacitors; Dielectric devices; EPROM; Leakage current; Microstructure; Morphology; Nonvolatile memory; Rapid thermal annealing; Rough surfaces; Thermal stresses;
Journal_Title :
Electron Devices, IEEE Transactions on