DocumentCode
1526009
Title
Parallel multiplication using fast sorting networks
Author
Fiore, Paul D.
Author_Institution
Sanders, Lockheed Martin Co., Nashua, NH, USA
Volume
48
Issue
6
fYear
1999
fDate
6/1/1999 12:00:00 AM
Firstpage
640
Lastpage
645
Abstract
A recent paper describes the use of Svoboda´s binary counter in the construction of fast parallel multipliers. The resulting approach was shown to be faster than the conventional Dadda multiplier when the wordlength N was small. Unfortunately, the growth in the number of gates of that method was O(N3) and the speed was O(N). In this paper, Batcher´s bitonic sorting network and other efficient networks replace the Svoboda counter. The asymptotic growth rate in gates of these new methods is O(N2 log2 N), and the speed is O(log2 N)
Keywords
counting circuits; digital arithmetic; sorting; bitonic sorting network; fast parallel multipliers; fast sorting networks; parallel multiplication; Adders; Counting circuits; Hardware; Propagation delay; Signal processing; Sorting;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.773800
Filename
773800
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