Title :
In-situ measurements of surface mount IC package deformations during reflow soldering
Author :
Pecht, Michael G. ; Govind, Anand
Author_Institution :
CALCE Center for Electron. Packaging, Maryland Univ., College Park, MD, USA
fDate :
7/1/1997 12:00:00 AM
Abstract :
In this study, a real-time probe was developed for in-process measurement and recording of package deformations during simulated solder reflow. The objective was to obtain fundamental insights into the stresses seen by the package during reflow, to guide package design, modeling, material selection, and process improvement efforts. Experiments were conducted to obtain temperature and time resolved deformation signatures of packages due to the applied reflow profile. The occurrence of delamination and cracking and the reflow parameters associated with its initiation were identified using the deformation plots and the observations were verified by post-reflow inspection using scanning acoustic microscopy. Absorbed moisture in the package was found to play a role in package deformations beyond 90°C, with an increased rate of deformations beyond approximately 138°C. Partial reflow simulation experiments revealed that these deformations were not caused by the initiation and growth of interfacial delaminations, but rather to moisture-induced swelling and thermal expansion effects
Keywords :
acoustic microscopy; cracks; delamination; inspection; integrated circuit measurement; integrated circuit packaging; integrated circuit reliability; moisture; plastic deformation; plastic packaging; reflow soldering; semiconductor process modelling; stress analysis; surface mount technology; swelling; thermal expansion; 40 to 235 C; absorbed moisture; cracking; delamination; in-process measurement; in-situ measurements; material selection; moisture-induced swelling; package design; package modeling; partial reflow simulation experiments; plastic encapsulated microcircuits; post-reflow inspection; real-time probe; reflow soldering; reliability; scanning acoustic microscopy; stresses; surface mount IC package deformation; temperature resolved deformation signatures; thermal expansion effects; time resolved deformation signatures; Conducting materials; Deformable models; Delamination; Inspection; Integrated circuit packaging; Microscopy; Probes; Semiconductor device modeling; Stress; Temperature;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on
DOI :
10.1109/3476.649442