Title :
A new systolic design for digital IIR filters
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
fDate :
5/1/1990 12:00:00 AM
Abstract :
Two systolic implementations of digital IIR filters are presented and compared with the designs of W. Luk and G. Jones (1988). It is shown that they represent a general class of systolic filters which reduce to canonical delay implementations in the limit
Keywords :
digital filters; canonical delay implementations; digital IIR filters; systolic design; Adders; Computer architecture; Delay effects; Delay lines; IIR filters; Latches; Propagation delay; Systolic arrays; Transfer functions; Very large scale integration;
Journal_Title :
Circuits and Systems, IEEE Transactions on
