DocumentCode :
1528805
Title :
Optimal granularity of test generation in a distributed system
Author :
Fujiwara, Hideo ; Inoue, Tomoo
Author_Institution :
Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
Volume :
9
Issue :
8
fYear :
1990
fDate :
8/1/1990 12:00:00 AM
Firstpage :
885
Lastpage :
892
Abstract :
The problem of test generation for logic circuits is known to be NP-hard, hence it is very difficult to speed up the test-generation process due to its backtracking mechanism. An approach to parallel processing of test generation for logic circuits in a loosely coupled distributed network of general-purpose computers is presented, and the effects of allocating target faults to processors, the optimal granularity (grain size of target faults), and the speed up ratio of the multiple processor system compared with a single processor system are analyzed
Keywords :
logic testing; parallel processing; NP-hard; backtracking mechanism; general-purpose computers; grain size of target faults; logic circuits; loosely coupled distributed network; multiple processor system; optimal granularity; parallel processing of test generation; problem of test generation; speed up ratio; test-generation process; Circuit analysis computing; Circuit faults; Circuit testing; Computer networks; Concurrent computing; Coupling circuits; Logic circuits; Logic testing; Parallel processing; System testing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.57783
Filename :
57783
Link To Document :
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