• DocumentCode
    1529046
  • Title

    SerDes Interoperability and Optimization

  • Author

    Kamm, Matthias ; Hongshin Jun ; Boluna, L.

  • Author_Institution
    Cisco Syst., Inc., San Jose, CA, USA
  • Volume
    29
  • Issue
    5
  • fYear
    2012
  • Firstpage
    47
  • Lastpage
    53
  • Abstract
    As SerDes use in system-level applications increases, interoperability and overall system optimization become greater challenges. This work presents a solution to these problems utilizing the combination of embedded link transmit and receive tests via system diagnostics software layer, JTAG, and the upcoming IEEE P1687 standard.
  • Keywords
    electronic engineering computing; embedded systems; open systems; optimisation; peripheral interfaces; IEEE P1687 standard; JTAG; SerDes interoperability; embedded link transmit; system diagnostic software layer; system optimization; system-level applications; Application specific integrated circuits; Bit error rate; IP networks; Instruments; Optimization; Software; Standards; ASIC; BER; BERT; CDR; JTAG; P1687; PRBS; SPMT; SerDes; SerDes Characterization; System Test;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2012.2201910
  • Filename
    6209507
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1529046