DocumentCode :
1530224
Title :
Ultra low-voltage/low-power digital floating-gate circuits
Author :
Berg, Yngvar ; Wisland, Dag T. ; Lande, Tor S.
Author_Institution :
Dept. of Inf., Oslo Univ., Norway
Volume :
46
Issue :
7
fYear :
1999
fDate :
7/1/1999 12:00:00 AM
Firstpage :
930
Lastpage :
936
Abstract :
This paper describes a novel technique for implementing ultra low-voltage/low-power digital circuits. The effective threshold voltage seen from a control gate is adjusted during a UV-light-activated tuning procedure. The optimal effective threshold voltage matching the supply voltage and speed may be programmed by UV light through an activated conductance between the power rails and the floating gates. Measured results are provided for gates operating down to 0.4-V power supply, using a standard double-poly CMOS process
Keywords :
CMOS digital integrated circuits; circuit tuning; integrated circuit design; low-power electronics; 0.4 V; UV-light-activated tuning procedure; activated conductance; digital floating-gate circuits; effective threshold voltage; low-power circuits; power rails; standard double-poly CMOS process; ultra low-voltage circuits; Capacitors; Circuit optimization; Coupling circuits; Delay; Digital circuits; Flip-flops; Nonvolatile memory; Rails; Threshold voltage; Voltage control;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.775389
Filename :
775389
Link To Document :
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