DocumentCode
1530384
Title
Prolog To An Overview Of Manufacturing Yield And Reliability Modeling For Semiconductor Products
Author
Esch, Jim
Volume
87
Issue
8
fYear
1999
Firstpage
1327
Lastpage
1328
Keywords
Electrostatic discharge; Failure analysis; Integrated circuit yield; Manufacturing processes; Pulp manufacturing; Semiconductor device manufacture; Semiconductor device reliability; Semiconductor materials; Testing; Virtual manufacturing;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/JPROC.1999.775415
Filename
775415
Link To Document