Title :
A Physics-Based Compact Model of III–V FETs for Digital Logic Applications: Current–Voltage and Capacitance–Voltage Characteristics
Author :
Oh, Saeroonter ; Wong, H. S Philip
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
Abstract :
A physics-based analytical compact model of InGaAs field-effect transistors (FETs) for digital logic applications is developed. This model neither heavily depends on parameter extraction nor requires any time-consuming computation while capturing the essential physics, enabling digital circuit design and circuit-level performance estimation for III-V FETs. The model captures short channel effects, trapezoidal-shape quantum-well energies, bias-dependent ballistic ratios, and capacitances including 2D potential profile information. Each is verified via numerical calculations and 2D electrostatic simulation, followed by a comparison of the model I-V characteristics with experiment data. Finally, the transient response of FO4 inverters demonstrates the use of the compact model for future technology circuit simulations.
Keywords :
III-V semiconductors; capacitance; digital integrated circuits; electrostatics; field effect transistors; gallium arsenide; indium compounds; integrated circuit design; III-V FET; InGaAs; bias-dependent ballistic ratio; capacitance-voltage characteristics; capacitances; circuit-level performance estimation; current-voltage characteristics; digital circuit design; digital logic application; electrostatic simulation; field-effect transistor; physics-based analytical compact model; short channel effect; trapezoidal-shape quantum-well energies; Analytical models; Capacitance-voltage characteristics; Circuit simulation; Digital circuits; FETs; III-V semiconductor materials; Indium gallium arsenide; Logic; Parameter extraction; Physics computing; Compact model; III–V field-effect transistor (FET); InGaAs; digital logic;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2009.2033411
