DocumentCode
1533039
Title
An analytical model for interaction of SIPOS layer with underlying silicon of SOI RESURF devices
Author
Chung, Sang-Koo ; Shin, Dong-Koo
Author_Institution
Dept. of Electron. Eng., Ajou Univ., Suwon, South Korea
Volume
46
Issue
8
fYear
1999
fDate
8/1/1999 12:00:00 AM
Firstpage
1804
Lastpage
1807
Abstract
An analytical model for interaction of semi-insulating polycrystalline silicon (SIPOS) layer with underlying silicon of SOI RESURF devices is presented which allows a clear picture of the potentials in the two regions coupled through the device parameters including the interface oxide thickness between the regions. The improvement in the breakdown voltage due to the presence of SIPOS layer is demonstrated, numerical simulations are shown to support the analytical model
Keywords
passivation; power semiconductor diodes; semiconductor device breakdown; semiconductor device models; silicon-on-insulator; SIPOS field plate; SOI RESURF diode; Si; analytical model; breakdown voltage improvement; device parameters; interface oxide thickness; semiinsulating polycrystalline Si; underlying silicon; Analytical models; Magnetic field measurement; Magnetic sensors; Numerical models; Physics; Silicon; Solid state circuits; Temperature distribution; Temperature sensors; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.777174
Filename
777174
Link To Document