A CMOS Low-Power Digital Polar Modulator System Integration for WCDMA Transmitter

This paper presents a novel low-power design and highly cost effective chip implementation solution of digital polar modulator for WCDMA transmitters using 0.35 μm mixed mode CMOS technology. The proposed coordinate rotation digital computer (CORDIC) in the polar modulator converts rectangular coordinate to polar coordinate with significantly less hardware and power comparing to the existing computational intensive algorithm by employing hard wired pipeline strategy to increase the performance and to reduce the hardware size. The proposed CORDIC performs a sequence of elementary rotations using shift and add operations without multiplications, providing a highly cost effective solution. The separate distribution of angle constants to each adder permits a hard-wire solution instead of using a lookup table, and all the shifters are hard-wired. Linear interpolators to extend the sampling rate for WCDMA specification are used to decrease the operating frequency. The proposed approach reduces both size and power by integrating booth CORDIC and power amplifier on the same die. The measured average power consumption is 27 mW with 67 MHz clock and 3 V power supply.