DocumentCode
1533681
Title
Effect of substrate bias on the performance and reliability of the split-gate source-side injected flash memory
Author
Huang, Kuo-Ching ; Fang, Yean-Kuen ; Yaung, Dun-Nian ; Chen, Chii-Wen ; Sung, Hung-Cheng ; Kuo, Di-Son ; Wang, Chung S. ; Liang, Mong-Song
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume
20
Issue
8
fYear
1999
Firstpage
412
Lastpage
414
Abstract
The effects of the substrate bias on the characteristics of split-gate EEPROM/Flash memory cells have been investigated. It is experimentally demonstrated that applying negative substrate bias (NSB) can improve the programming and erasing speed significantly. The improvements can be attributed that NSB effectively increase the needed electrical fields for fast programming and erasing, respectively. Furthermore, the cycling endurance is improved considerably if NSB is applied for programming and erasing operation both.
Keywords
flash memories; integrated circuit reliability; EEPROM cell; cycling endurance; electrical field; erasing speed; negative substrate bias; programming speed; reliability; source-side injection; split-gate flash memory; EPROM; Electrons; Etching; Flash memory; Flash memory cells; Nonvolatile memory; Silicon; Split gate flash memory cells; Tunneling; Voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.778161
Filename
778161
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