DocumentCode :
1533954
Title :
An iterative cutting procedure for determining the optimal wafer exposure pattern
Author :
Chen-Fu Chien ; Shao-Chung Hsu ; Chih-Ping Chen
Author_Institution :
Dept. of Ind. Eng. & Eng. Manage., Nat. Tsing Hua Univ., Hsinchu
Volume :
12
Issue :
3
fYear :
1999
fDate :
8/1/1999 12:00:00 AM
Firstpage :
375
Lastpage :
377
Abstract :
Conventionally, people focus on defect reduction to improve yield rate. Little research has been done to deal with the problem of optimizing wafer exposure patterns. This paper develops a computer-based procedure to maximize the number of dies possibly produced from a wafer. A program has been developed and implemented in a 6-in wafer fabrication factory in Taiwan. The results validate the practical viability of the proposed procedure
Keywords :
cutting; integrated circuit yield; iterative methods; optimisation; dies; iterative cutting procedure; optimal wafer exposure pattern; wafer fabrication factory; yield rate; Costs; Councils; Expert systems; Fabrication; Investments; Optimization methods; Production facilities; Sawing; Shape; Upper bound;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.778206
Filename :
778206
Link To Document :
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