DocumentCode :
1534464
Title :
A voltage reduction technique for battery-operated systems
Author :
Von Kaenel, Vincent ; Macken, Peter ; Degrauwe, Marc G R
Author_Institution :
Centre Suisse d´´Electron. et de Microtech. SA, Neuchatel, Switzerland
Volume :
25
Issue :
5
fYear :
1990
fDate :
10/1/1990 12:00:00 AM
Firstpage :
1136
Lastpage :
1140
Abstract :
Two techniques for voltage reduction are presented, both of which can significantly reduce the power consumption of digital CMOS circuits. The fixed reduction of voltage is applicable to small systems with a low initial consumption, however, the optimum voltage is not reached and the correct operation of the circuit is not guaranteed. The self-adjusted reduction of voltage is adapted to bigger digital systems. The correct operation of the digital circuit is guaranteed, and the supply voltage is near the optimum for the speed requirements. This technique is more versatile, accurate, and reliable than the fixed one
Keywords :
CMOS integrated circuits; digital integrated circuits; power supply circuits; battery-operated systems; digital CMOS circuits; power consumption-reduction; self-adjusted reduction; voltage reduction technique; Digital circuits; Energy consumption; Geometry; Instruments; Portable computers; Power system reliability; Temperature; Very large scale integration; Voltage; Watches;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.62134
Filename :
62134
Link To Document :
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