DocumentCode :
1535299
Title :
Embedded totally self-checking checkers: a practical design
Author :
Kundu, Sandip ; Reddy, Sudhakar M.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume :
7
Issue :
4
fYear :
1990
Firstpage :
5
Lastpage :
12
Abstract :
In a totally self-checking (TSC) design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. A method of designing checkers that solves this difficulty is proposed. The method uses TSC checkers based on flip-flops instead of using the mostly combinational checkers now available. Two design applications are presented: TSC checkers for arithmetic AN codes, and a TSC iterative logic array.<>
Keywords :
automatic testing; combinatorial circuits; logic arrays; logic testing; TSC iterative logic array; arithmetic AN codes; combinational checkers; embedded totally self checking checkers; flip-flops; Circuit faults; Circuit testing; Computer errors; Computerized monitoring; Condition monitoring; Electrical fault detection; Error correction codes; Fault detection; Fault diagnosis; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.57909
Filename :
57909
Link To Document :
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