Dynamic and short-circuit power of CMOS gates driving lossless transmission lines

Author

Ismail, Yehea I. ; Friedman, Eby G. ; Neves, J.L.

Author_Institution

Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA

Volume

46

Issue

8

fYear

1999

fDate

8/1/1999 12:00:00 AM

Firstpage

950

Lastpage

961

Abstract

The dynamic and short-circuit power consumption of a complementary metal-oxide-semiconductor (CMOS) gate driving an inductance-capacitance (LC) transmission line as a limiting case of an RLC transmission line is investigated in this paper. Closed-form solutions for the output voltage and short-circuit power of a CMOS gate driving an LC transmission line are presented. A closed form solution for the short-circuit power is also presented. These solutions agree with circuit simulations within 11% error for a wide range of transistor widths and line impedances for a 0.25-μm CMOS technology. The ratio of the short circuit to dynamic power is shown to be less than 7% for CMOS gates driving LC transmission lines where the line is matched or underdriven. The total power consumption is expected to decrease as inductance effects becomes more significant as compared to a resistance-capacitance (RC)-dominated interconnect line

Keywords

CMOS integrated circuits; VLSI; circuit simulation; integrated circuit interconnections; transmission lines; 0.25 micron; CMOS gates; circuit simulations; closed-form solutions; dynamic power consumption; inductance effects; inductance-capacitance transmission line; line impedances; lossless transmission lines; output voltage; short-circuit power; transistor widths; CMOS technology; Circuit simulation; Closed-form solution; Distributed parameter circuits; Energy consumption; Impedance; Inductance; Power transmission lines; RLC circuits; Voltage;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.780376

Filename

780376