Harmonic distortion due to output conductance in SI cells

A closed-form equation for the effect of the output conductance on the harmonic distortion in switched-current basic memory cells is presented here. The authors show that in memory cells with short channel transistors, the variation of the output conductance can generate high levels of harmonic distortion (-51 dB for L=2 μm using a 1.2 μm CMOS technology); however a suitable relation of transistor lengths can lead to very low distortion levels. The results are confirmed both by simulation and measurements on an IC prototype