• DocumentCode
    1535756
  • Title

    Recursive algorithm for calculating effective resistances in RC tree

  • Author

    Chang, Molin ; Yih, Shuih-Jong ; Feng, Wu-Shiung

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    33
  • Issue
    2
  • fYear
    1997
  • fDate
    1/16/1997 12:00:00 AM
  • Firstpage
    131
  • Lastpage
    133
  • Abstract
    Internal charges will affect the delay behaviour of a CMOS gate. To estimate each individual delay component due to charges stored in the different internal nodes, the effective resistance of each internal node is first computed. A recursive algorithm EER is proposed to solve this problem efficiently
  • Keywords
    CMOS logic circuits; RC circuits; delays; electric resistance; logic gates; recursive estimation; trees (mathematics); CMOS gate; EER recursive algorithm; RC tree; delay; effective resistance;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970076
  • Filename
    579425