DocumentCode
1535868
Title
Design for Manufacturing of Low-Voltage Three-Dimensional Capacitors
Author
Nongaillard, Matthieu ; Lallemand, Florent ; Allard, Bruno
Author_Institution
Ampere Lab., Inst. Nat. des Sci. Appl. de Lyon, Villeurbanne, France
Volume
10
Issue
3
fYear
2010
Firstpage
396
Lastpage
402
Abstract
Given an existing manufacturing technology, the influence of the design parameters has been evaluated in order to improve the robustness of the 3-D capacitors. The objective is to select the capacitor patterns that provide a satisfying density with the required robustness with respect to the reliability indicators. The geometrical and manufacturing-related issues are both considered. The main manufacturing issues are the etching, deposition, and warpage of the wafer. The improvements have been observed experimentally for the robustness of the 3-D structures and the density of the capacitor which are increased for several proposed 3-D patterns. All capacitors tested in this paper are realized with PICS technology.
Keywords
CAD/CAM; capacitors; design for manufacture; etching; integrated circuit manufacture; 3D capacitor pattern; capacitor density; deposition; etching; low voltage three-dimensional capacitor; manufacturing technology; reliability indicator; wafer; warpage; CMOS technology; Capacitors; Circuits; Dielectric substrates; Electrodes; Etching; Low voltage; Manufacturing processes; Permittivity; Robustness; Capacitors; design for manufacturing; three dimensional integrated circuits;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2010.2058114
Filename
5510120
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