Author :
Liu, Chih-Wei ; Huang, Kuo-Tai ; Lu, Chung-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
An efficient implementation of a parallel version of the Feng-Rao algorithm on a one-dimensional systolic array is presented in this paper by adopting an extended syndrome matrix. Syndromes of the same order, lying on a slant diagonal in the extended syndrome matrix, are scheduled to be examined by a series of cells simultaneously and, therefore, a high degree of concurrency of the Feng-Rao algorithm can be achieved. The time complexity of the proposed architecture is m+g+1 by using a series of t+[g-1/2]+1, nonhomogeneous but regular, effective processors, called PE cells, and g trivial processors, called D cells, where t is designed as the half of the Feng-Rao bound. Each D cell contains only delay units, while each PE cell contains one finite-field inverter and, except the first one, one or more finite-field multipliers. Cell functions of each PE cell are basically the same and the overall control circuit of the proposed array is quite simple. The proposed architecture requires, in total, t+[g-1]+1 finite-field inverters and (t+[(g´1)/2])(t+[(g-1)/2]+1)/2 finite-field multipliers. For a practical design, this hardware complexity is acceptable
Keywords :
computational complexity; error correction codes; parallel algorithms; systolic arrays; Feng-Rao algorithm; concurrency; delay units; extended syndrome matrix; finite-field inverter; hardware complexity; slant diagonal; systolic array implementation; time complexity; Circuits; Concurrent computing; Decoding; Delay; Hardware; Inverters; Iterative algorithms; Linear code; Scheduling algorithm; Systolic arrays;