DocumentCode :
1536308
Title :
Optimizing the Readout Bias for the Capacitorless 1T Bulk FinFET RAM Cell
Author :
Collaert, N. ; Aoulaiche, M. ; Rakowski, M. ; Redolfi, A. ; De Wachter, B. ; Van Houdt, J. ; Jurczak, M.
Author_Institution :
IMEC, Leuven, Belgium
Volume :
30
Issue :
12
fYear :
2009
Firstpage :
1377
Lastpage :
1379
Abstract :
In this letter, we demonstrate a one-transistor capacitorless DRAM on standard bulk FinFET, using no additional processing. It is shown that, due to the use of the ground-plane doping and optimization of the READ bias conditions, no special process adjustment is required to obtain wide programming windows and long retention times, even for fin widths down to 20 nm.
Keywords :
DRAM chips; MOSFET; digital readout; DRAM; capacitorless 1T bulk FinFET RAM cell; ground-plane doping; long retention times; one-transistor capacitorless DRAM; programming winnot dows; readout bias; Bulk FinFET; one-transistor (1T) capacitorless DRAM;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2009.2034395
Filename :
5308449
Link To Document :
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