Title :
Test resource partitioning for SOCs
Author :
Chandra, Anshuman ; Chakrabarty, Krishnendu
Author_Institution :
Duke Univ., Durham, NC, USA
Abstract :
A new test-resource-partitioning approach, based on test data compression and on-chip decompression, reduces data volume, decreases testing time, and accommodates slower (less expensive) testers without decreasing test duality
Keywords :
logic testing; microprocessor chips; SOCs; test data compression; test duality; test-resource-partitioning; testers; testing time; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit testing; Compaction; Decoding; Hardware; Logic testing; Random access memory; Test data compression;
Journal_Title :
Design & Test of Computers, IEEE
