DocumentCode
1536822
Title
ISSCC panel says “yes… maybe” to 100-day hardware
Volume
6
Issue
4
fYear
2001
Firstpage
5
Lastpage
5
Abstract
A panel of experts gathered in San Francisco in February to ask, can 100 million transistors in a 100-square-millimeter die be designed in 100 days? And the answer was … maybe. The good news is that the notorious productivity gap is being closed by re-use and platform-based design, but only for digital and memory-intensive circuits, as industry is increasingly looking to integrate and re-use analog circuits. The gap exists between the slower growth in design productivity over manufacturing productivity, and analog circuits are proving resistant to design automation and still require — and get — much handcrafting. These were the observations of the panel of EDA and System-On-Chip experts gathered at International Solid-State Circuits Conference.
fLanguage
English
Journal_Title
Solid-State Circuits Society Newsletter, IEEE
Publisher
ieee
ISSN
1098-4232
Type
jour
DOI
10.1109/N-SSC.2001.6499799
Filename
6499799
Link To Document