DocumentCode :
1537543
Title :
Back-gate and series resistance effects in LDMOSFETs on SOI
Author :
Vandooren, Anne ; Cristoloveanu, Sorin ; Mojarradi, Mohammad ; Kolawa, Elizabeth
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Volume :
48
Issue :
10
fYear :
2001
fDate :
10/1/2001 12:00:00 AM
Firstpage :
2410
Lastpage :
2416
Abstract :
Detailed experimental results are used to develop a new model for the linear region of operation of lateral DMOSFETs (LDMOSFETs) on silicon-on-insulator (SOI) that includes the influence of the buried oxide and back-gate. Back-gate biasing results in double-channel conduction and bias-dependent series resistance. Pertinent techniques for parameter extraction are presented and contrasted to those currently used in low-voltage SOI MOSFETs. The typical feature of LDMOSFETs is the significant change in series resistance as the back-gate is driven from accumulation to inversion. The model allows a clear identification of the architectural and technological parameters of the device
Keywords :
buried layers; electric admittance; parameter estimation; power MOSFET; semiconductor device models; silicon-on-insulator; 0.35 mum; CMOS/SOI technology; SOI LDMOSFETs; accumulation; back-gate biasing; bias-dependent series resistance; buried oxide; double-channel conduction; inversion; lateral DMOSFETs; linear operation region model; parameter extraction; power MOSFET; silicon-on-insulator; CMOS technology; Laboratories; MOSFETs; Propulsion; Semiconductor device modeling; Semiconductor films; Silicon on insulator technology; Space technology; Substrates; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.954485
Filename :
954485
Link To Document :
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