• DocumentCode
    1537792
  • Title

    Bipolar transistor epilayer design using the MAIDS mixed-level simulator

  • Author

    De Vreede, Leo C N ; De Graaff, Henk C. ; Willemen, Joost A. ; Van Noort, Wibo ; Jos, Rik ; Larson, Lawrence E. ; Slotboom, Jan W. ; Tauritz, Joseph L.

  • Author_Institution
    Dept. of Inf. Technol. & Syst., Delft Univ. of Technol., Netherlands
  • Volume
    34
  • Issue
    9
  • fYear
    1999
  • fDate
    9/1/1999 12:00:00 AM
  • Firstpage
    1331
  • Lastpage
    1338
  • Abstract
    In this paper, we address the epilayer design of the bipolar transistor using the one-dimensional (1-D) mixed-level simulator MAIDS (microwave active integral device simulator). MAIDS facilitates simulation of the electrical behavior of bipolar (hetero) junction transistors with various doping profiles and under different signal conditions in a realistic circuit environment. MAIDS as implemented within Hewlett Packard´s microwave design system is a useful and promising tool in the development of bipolar transistors for large-signal conditions. Using MAIDS, we have identified the dominant bipolar transistor distortion sources with respect to the biasing conditions. Simulation results are compared with small- and large-signal measurements for the BFQ135 transistor, which has been developed for cable television (CATV) applications. By analyzing the measured and simulated data, we have developed an optimum epilayer design map for third-order intermodulation distortion that has proven to be particularly useful in the epilayer dimensioning of transistors for CATV applications
  • Keywords
    bipolar transistors; digital simulation; doping profiles; electronic engineering computing; equivalent circuits; heterojunction bipolar transistors; intermodulation distortion; nonlinear distortion; semiconductor device models; semiconductor epitaxial layers; BFQ135 transistor; BJT; CATV applications; HBT; Hewlett Packard microwave design system; MAIDS mixed-level simulator; biasing conditions; bipolar heterojunction transistors; bipolar junction transistors; bipolar transistor distortion sources; bipolar transistor epilayer design; circuit environment; doping profiles; electrical behavior; intermodulation distortion; large-signal conditions; microwave active integral device simulator; optimum epilayer design map; third-order IMD; Analytical models; Bipolar transistor circuits; Bipolar transistors; Cable TV; Circuit simulation; Distortion measurement; Doping profiles; Microwave devices; Microwave transistors; Particle measurements;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.782094
  • Filename
    782094