DocumentCode
1537997
Title
Formal verification of hardware correctness: introduction and survey of current research
Author
Camurati, Paolo ; Prinett, Paolo
Author_Institution
Politecnico di Torino, Italy
Volume
21
Issue
7
fYear
1988
fDate
7/1/1988 12:00:00 AM
Firstpage
8
Lastpage
19
Abstract
Formal verification techniques are analyzed, focusing on two key points: suitable representation systems and mechanizable proofs. Different approaches to hardware verification are first examined, and formal verification and automated synthesis are compared to show how they cooperate in producing zero-defect designs. The different techniques are evaluated. Cross fertilization with software verification techniques is discussed.<>
Keywords
computer testing; program verification; automated synthesis; formal verification; hardware correctness; hardware verification; mechanizable proofs; software verification; suitable representation systems; zero-defect designs; Formal verification; Hardware; Joining processes; Logic; Manufacturing processes; Microprogramming; Safety devices; Software safety; Specification languages; Timing;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/2.65
Filename
65
Link To Document