Title :
Matrix and vector multiplications using a 21/2-dimensional systolic array
Author_Institution :
East Anglia Univ., Norwich, UK
Abstract :
A pseudo-three-dimensional network, called a 21/2-dimensional systolic array, to compute matrix-vector and matrix-matrix multiplications is introduced. The new architecture achieves twice the throughput rate as that of the conventional systolic arrays with the same number of processing elements. This new approach provides a practical means for the implementation using current integration technology.
Keywords :
VLSI; cellular arrays; matrix algebra; parallel algorithms; parallel architectures; 2 1/ 2-dimensional systolic array; VLSI; computer architecture; digital arithmetic; image processing; matrix vector multiplication; matrix-matrix multiplications; pseudo-three-dimensional network;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900932