Title :
High-performance standard cell library and modeling technique for differential advanced bipolar current tree logic
Author :
Greub, Hans J. ; McDonald, John F. ; Creedon, Ted ; Yamaguchi, Tadanori
Author_Institution :
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
fDate :
5/1/1991 12:00:00 AM
Abstract :
A high-performance standard cell library for the Tektronix advanced bipolar process GST1 has been developed. The library is targeted for the 250-MIPS (million instructions per second) fast reduced instruction set computer (FRISC) project. The GST1 devices have a minimal emitter size of 0.6 μm×2.4 μm and a maximum f t of 15.5 GHz. By combining advanced bipolar technology and high-speed differential logic, gate propagation delays of 90 ps can be achieved at a power dissipation of 70 mW. The fastest buffers/inverters have a propagation delay of only 68 ps. A 32-b ALU (arithmetic and logic unit) partitioned into four slices can perform an addition in 3 ns using differential standard cells with improved emitter-follower outputs and fast differential I/O drivers. A modeling technique for high-speed differential current tree logic is introduced. The technique gives accurate timing information and models the transient behavior of current trees
Keywords :
bipolar integrated circuits; circuit analysis computing; integrated logic circuits; logic CAD; 10 mW; 15.5 GHz; 250 MIPS; 32 bit; 68 ps; 90 ps; ALU; CAD; FRISC; GST1; Tektronix advanced bipolar process; arithmetic/logic unit; current tree logic; fast reduced instruction set computer; gate propagation delays; high-speed differential logic; modeling technique; power dissipation; standard cell library; transient behavior; Arithmetic; Computer aided instruction; Inverters; Libraries; Logic devices; Logic gates; Power dissipation; Propagation delay; Standards development; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
